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Taiwan
الشخص الذي يمكن الاتصال به Mr. Evan
6F, No. 168, Lian Cheng Rd.,, Chung Ho, Taipei
DDR2 Module * JEDEC standard 1.7V~ 1.9V Power Supply. * VDDQ = 1.7V~1.9V * **7MHz fCK for **3Mb/sec/pin, **3MHz fCKfor **7Mb/sec/pin, **0MHz fCK for **0Mb/sec/pin, **0MHz fCK for ***6Mb/sec/pin * 4 Banks * Posted /CAS * Programmable /CAS Latency: 4, 5. * Programmable Additive Latency: 0, 1 , 2 , 3 and 4. * Write Latency(WL) = Read Latency(RL) *1. * Burst Length : 4 , 8(Interleave/nibble sequential). * Programmable Sequential / Interleave Burst Mode. * Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature). * Off-Chip Driver(OCD) Impedance Adjustment. * On Die Termination with selectable values(*0/*5/**0 ohms or disable). * PASR(Partial Array Self Refresh). * Average Refresh Period 7.8us at lower than a TCASE *5°C, 3.9us at *5°C < TCASE *5°C. - support High Temperature Self-Refresh rate enable feature. * All of Lead-free products are compliant for RoHS.