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Transmitter Section

Transmitter is designed for single mode fiber and operates at a nominal wavelength of ***0nm. The transmitter module uses a MQW FP laser diode and full IEC**5 and CDRH class 1 eye safety. The output power can be disabled via the single TxDis pin. Logic LVTTL HIGH level disables the transmitter. It contains APC function, temperature compensation circuit, PECL data s, LVTTL Txdis and Tx fault Output interface.

Receiver Section

The receiver section uses a hermetic packaged front end receiver (InGaAs PIN and preamplifier). The post amplifier is AC coupled to preamplifier through a capacitor and a low pass filter. The capacitor and LPF are enough to pass the signal from 5Mb/s to ***0Mb/s without significant distortion or performance penalty. The LPF limits the preamplifier bandwidth to improve receiver sensitivity. As the optical is decreased, LOS will switch from low to high. As the optical power is increased from very low levels, LOS will switch back from high to low.

EEPROM Section

The optical transceiver contains an EEPROM. It provides access to sophisticated identification information that describes the transceivers capabilities, standard interfaces, manufacturer, and other information

The serial interface uses the *-wire serial CMOS EEPROM protocol defined for the ATMEL AT*4C*1A/*2/*4 family of components. When the serial protocol is activated, the host generates the serial clock signal (SCL, Mod Def 1). The positive edge clocks data into those segments of the EEPROM that are not writing protected within the SFP transceiver. The negative edge clocks data from the SFP transceiver. The serial data signal (SDA, Mod Def 2) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of *-bit data words that can be addressed individually or sequentially.

The Module provides diagnostic information about the present operating conditions. The transceiver generates this diagnostic data by digitization of internal analog signals. Calibration and alarm/warning threshold data is written during device manufacture. Received power monitoring, transmitted power monitoring, bias current monitoring, supply voltage monitoring and temperature monitoring all are implemented. The diagnostic data are raw A/D values and must be converted to real world units using calibration constants stored in EEPROM locations *6 *5 at wire serial bus address A2h. The digital diagnostic memory map specific data field defines as following.